202 lines
6.0 KiB
C
202 lines
6.0 KiB
C
/**
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*******************************************************************************************************
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* @file fm33lg0xx_fl_rng.c
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* @author FMSH Application Team
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* @brief Src file of RNG FL Module
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*******************************************************************************************************
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* @attention
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*
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* Copyright (c) [2021] [Fudan Microelectronics]
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* THIS SOFTWARE is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*
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*******************************************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "fm33lg0xx_fl.h"
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/** @addtogroup FM33LG0XX_FL_Driver
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* @{
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*/
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/** @addtogroup RNG
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* @{
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*/
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#ifdef FL_RNG_DRIVER_ENABLED
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup RNG_FL_Private_Macros
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* @{
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*/
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#define IS_FL_RNG_INSTANCE(INTANCE) ((INTANCE) == RNG)
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#define IS_FL_RNG_CLOCK_PRESCALER(__VALUE__) (((__VALUE__) == FL_CMU_RNG_PSC_DIV1)||\
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((__VALUE__) == FL_CMU_RNG_PSC_DIV2)||\
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((__VALUE__) == FL_CMU_RNG_PSC_DIV4)||\
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((__VALUE__) == FL_CMU_RNG_PSC_DIV8)||\
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((__VALUE__) == FL_CMU_RNG_PSC_DIV16)||\
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((__VALUE__) == FL_CMU_RNG_PSC_DIV32))
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/**
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*@}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup RNG_FL_EF_Init
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* @{
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*/
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/**
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* @brief 复位对应RNG寄存器.
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*
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* @param RNGx 外设入口地址
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*
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* @retval ErrorStatus枚举值
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* -FL_PASS 配置成功
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* -FL_FAIL 配置过程发生错误
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*/
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FL_ErrorStatus FL_RNG_DeInit(RNG_Type *RNGx)
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{
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assert_param(IS_FL_RNG_INSTANCE(RNGx));
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/* 使能外设复位 */
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FL_RMU_EnablePeripheralReset(RMU);
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/* 复位外设寄存器 */
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FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_RNG);
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FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_RNG);
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/* 关闭外设总线始时钟和工作时钟 */
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FL_CMU_DisableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_RNG);
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/* 锁定外设复位 */
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FL_RMU_DisablePeripheralReset(RMU);
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return FL_PASS;
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}
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/**
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* @brief 根据 InitStruct 的配置信息初始化对应外设入口地址的寄存器值.
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* @param RNGx 外设入口地址
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*
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* @param initStruct 指向一个 @ref FL_RNG_InitTypeDef 结构体 其中包含了外设的相关配置信息.
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*
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* @note RNG使用RCHF默认的8M作为时钟输入，经2分频后4M提供给RNG
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*
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* @retval ErrorStatus枚举值
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* -FL_PASS 配置成功
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* -FL_FAIL 配置过程发生错误
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*/
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FL_ErrorStatus FL_RNG_Init(RNG_Type *RNGx)
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{
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assert_param(IS_FL_RNG_INSTANCE(RNGx));
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/* RNG 使用RCHF作为工作时钟因此必须确认RCHF使能*/
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if(FL_CMU_RCHF_IsEnabled() != FL_SET)
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{
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FL_CMU_RCHF_Enable();
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}
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/* RNG 总线时钟使能 */
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FL_CMU_EnableGroup2BusClock(FL_CMU_GROUP2_BUSCLK_RNG);
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/* RNG 工作时钟预分频*/
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switch(FL_CMU_GetRCHFClockFreq())
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{
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case FL_CMU_RCHF_FREQUENCY_8MHZ:
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FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV2);
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break;
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case FL_CMU_RCHF_FREQUENCY_16MHZ:
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FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV4);
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break;
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case FL_CMU_RCHF_FREQUENCY_24MHZ:
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FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV8);
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break;
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case FL_CMU_RCHF_FREQUENCY_32MHZ:
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FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV8);
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break;
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default:
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FL_CMU_SetRNGPrescaler(FL_CMU_RNG_PSC_DIV2);
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break;
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}
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/* RNG 工作时钟使能*/
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FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_RNG);
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return FL_PASS;
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}
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/**
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* @brief 获取一次随机数
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*
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* @param None
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*
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* @note 如果返回值为0xFFFFFFFF 则说明随机数生成失败，请用户检查此函数的返回值，失败时重新生成
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*
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* @retval 成功返回随机数，失败返回0xFFFFFFFF
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*
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*/
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uint32_t GetRandomNumber(void)
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{
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uint32_t rn32;
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FL_RNG_ClearFlag_RandomFail(RNG);
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FL_RNG_Enable(RNG);
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/* 由于LFSR循环移位周期是32cycle，为保证随机数质量，应用应保证两次读取RNGOUT之间的间隔大于32个TRNG_CLK周期 */
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FL_DelayUs(12);
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FL_RNG_Disable(RNG);
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rn32 = FL_RNG_ReadData(RNG);
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if(FL_RNG_IsActiveFlag_RandomFail(RNG))
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{
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FL_RNG_ClearFlag_RandomFail(RNG);
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return 0xFFFFFFFF;
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}
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return rn32;
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}
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/**
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* @brief 获取CRC32
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*
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* @param dataIn 待计算的数据
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*
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* @note None
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*
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* @retval 成功返回CRC32，失败返回0xFFFFFFFF
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*
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*/
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uint32_t GetCrc32(uint32_t dataIn)
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{
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uint32_t i = 0;
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uint32_t crc32 = 0;
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FL_RNG_CRC_WriteData(RNG, dataIn);
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FL_RNG_ClearFlag_CRCComplete(RNG);
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FL_RNG_CRC_Enable(RNG);
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while(0 == FL_RNG_IsActiveFlag_CRCComplete(RNG))
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{
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i++;
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if(i > 600)
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{ break; }
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}
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if(i >= 600)
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{
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FL_RNG_ClearFlag_CRCComplete(RNG);
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FL_RNG_Disable(RNG);
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return 0xFFFFFFFF;
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}
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FL_RNG_ClearFlag_CRCComplete(RNG);
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crc32 = FL_RNG_ReadData(RNG);
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FL_RNG_Disable(RNG);
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return crc32;
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}
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/**
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* @}
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*/
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#endif /* FL_RNG_DRIVER_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
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