220 lines
11 KiB
C
220 lines
11 KiB
C
/**
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****************************************************************************************************
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* @file fm33lg0xx_fl_comp.c
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* @author FMSH Application Team
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* @brief Src file of COMP FL Module
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****************************************************************************************************
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* @attention
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*
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* Copyright (c) [2021] [Fudan Microelectronics]
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* THIS SOFTWARE is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*
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****************************************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "fm33lg0xx_fl.h"
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/** @addtogroup FM33LG0XX_FL_Driver
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* @{
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*/
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/** @addtogroup COMP
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* @{
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*/
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#ifdef FL_COMP_DRIVER_ENABLED
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup COMP_FL_Private_Macros
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* @{
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*/
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#define IS_COMP_ALL_INSTANCE(INTENCE) (((INTENCE) == COMP1)||\
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((INTENCE) == COMP2)||\
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((INTENCE) == COMP3))
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#define IS_FL_COMP_POSITIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INP_SOURCE_INP1)||\
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((__VALUE__) == FL_COMP_INP_SOURCE_INP2)||\
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((__VALUE__) == FL_COMP_INP_SOURCE_AVREF)||\
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((__VALUE__) == FL_COMP_INP_SOURCE_ULPBG_REF)||\
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((__VALUE__) == FL_COMP_INP_SOURCE_VDD15)||\
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((__VALUE__) == FL_COMP_INP_SOURCE_VREFP))
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#define IS_FL_COMP_NEGATIVEINPUT(__VALUE__) (((__VALUE__) == FL_COMP_INN_SOURCE_INN1)||\
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((__VALUE__) == FL_COMP_INN_SOURCE_INN2)||\
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((__VALUE__) == FL_COMP_INN_SOURCE_VREF)||\
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((__VALUE__) == FL_COMP_INN_SOURCE_VREF_DIV_2)||\
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((__VALUE__) == FL_COMP_INN_SOURCE_VREFP)||\
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((__VALUE__) == FL_COMP_INN_SOURCE_DAC))
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#define IS_FL_COMP_POLARITY(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_POLARITY_NORMAL)||\
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((__VALUE__) == FL_COMP_OUTPUT_POLARITY_INVERT))
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#define IS_FL_COMP_EDGE(__VALUE__) (((__VALUE__) == FL_COMP_INTERRUPT_EDGE_BOTH)||\
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((__VALUE__) == FL_COMP_INTERRUPT_EDGE_RISING )||\
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((__VALUE__) == FL_COMP_INTERRUPT_EDGE_FALLING))
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#define IS_FL_COMP_DIGITAL_FILTER(__VALUE__) (((__VALUE__) == FL_DISABLE)||\
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((__VALUE__) == FL_ENABLE))
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#define IS_FL_COMP_DIGITAL_FILTER_LEN(__VALUE__) (((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK)||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_4APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_5APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_6APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_7APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_8APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_9APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_10APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_11APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_12APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_13APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_14APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_15APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_16APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_17APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_18APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_19APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_20APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_21APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_22APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_23APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_24APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_25APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_26APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_27APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_28APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_29APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_30APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_31APBCLK )||\
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((__VALUE__) == FL_COMP_OUTPUT_FILTER_WINDOW_32APBCLK))
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup COMP_FL_EF_Init
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* @{
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*/
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/**
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* @brief 复位对应COMP控制寄存器.
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* @param COMPx COMP Port
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* @retval ErrorStatus枚举值:
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* -FL_PASS 外设寄存器值恢复复位值
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* -FL_FAIL 未成功执行
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*/
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FL_ErrorStatus FL_COMP_DeInit(COMP_Type *COMPx)
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{
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/* 入口参数检查 */
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assert_param(IS_COMP_ALL_INSTANCE(COMPx));
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/* 恢复寄存器值为默认值 */
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COMPx->CR = 0x00000000U;
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return FL_PASS;
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}
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/**
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* @brief 根据 COMP_InitStruct的配置信息初始化对应外设.
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* @param COMPx COMP Port
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* @param initStruct 指向一个 @ref FL_COMP_InitTypeDef 结构体
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* 其中包含了外设的相关配置信息.
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* @param Serial 比较器序号可取值：
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* 1 配置比较器1
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* 2 配置比较器2
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* @retval ErrorStatus枚举值
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* -FL_FAIL 配置过程发生错误
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* -FL_PASS COMP配置成功
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*/
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FL_ErrorStatus FL_COMP_Init(COMP_Type *COMPx, FL_COMP_InitTypeDef *initStruct)
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{
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/* 入口参数检查 */
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assert_param(IS_COMP_ALL_INSTANCE(COMPx));
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assert_param(IS_FL_COMP_EDGE(initStruct->edge));
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assert_param(IS_FL_COMP_POLARITY(initStruct->polarity));
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assert_param(IS_FL_COMP_POSITIVEINPUT(initStruct->positiveInput));
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assert_param(IS_FL_COMP_NEGATIVEINPUT(initStruct->negativeInput));
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assert_param(IS_FL_COMP_DIGITAL_FILTER(initStruct->digitalFilter));
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assert_param(IS_FL_COMP_DIGITAL_FILTER_LEN(initStruct->digitalFilterLen));
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/* 使能时钟总线 */
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FL_CMU_EnableGroup1BusClock(FL_CMU_GROUP1_BUSCLK_COMP);
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/* 比较器输出极性选择 */
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FL_COMP_SetOutputPolarity(COMPx, initStruct->polarity);
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/* 比较器正向输入选择 */
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FL_COMP_SetINPSource(COMPx, initStruct->positiveInput);
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/* 比较器反向输入选择 */
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FL_COMP_SetINNSource(COMPx, initStruct->negativeInput);
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/* 比较器使用1/2(internal reference) 打开buffer */
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if(initStruct->negativeInput == FL_COMP_INN_SOURCE_VREF_DIV_2)
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{
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FL_COMP_EnableBuffer(COMP); /* buffer使能 */
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FL_COMP_DisableBufferBypass(COMP); /* 不bypass buffer */
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}
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/* 比较器数字滤波 */
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if(COMPx == COMP1)
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{
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/* 比较器中断边沿选择 */
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FL_COMP_SetComparator1InterruptEdge(COMP, ((initStruct->edge) << COMP_ICR_CMP1SEL_Pos));
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}
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else
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if(COMPx == COMP2)
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{
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/* 比较器中断边沿选择 */
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FL_COMP_SetComparator2InterruptEdge(COMP, ((initStruct->edge) << COMP_ICR_CMP2SEL_Pos));
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}
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else
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{
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/* 比较器中断边沿选择 */
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FL_COMP_SetComparator3InterruptEdge(COMP, ((initStruct->edge) << COMP_ICR_CMP3SEL_Pos));
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}
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/* 滤波 */
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if(initStruct->digitalFilter)
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{
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FL_COMP_EnableOutputFilter(COMPx);
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}
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else
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{
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FL_COMP_DisableOutputFilter(COMPx);
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}
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/* 滤波长度 */
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FL_COMP_SetOutputFilterWindow(COMPx, initStruct->digitalFilterLen);
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return FL_PASS;
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}
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/**
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* @brief 设置 initStruct 为默认配置
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* @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_COMP_InitTypeDef 结构体
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*
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* @retval None
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*/
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void FL_COMP_StructInit(FL_COMP_InitTypeDef *initStruct)
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{
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/* 复位配置信息 */
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initStruct->edge = FL_COMP_INTERRUPT_EDGE_BOTH;
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initStruct->polarity = FL_COMP_OUTPUT_POLARITY_NORMAL;
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initStruct->negativeInput = FL_COMP_INN_SOURCE_INN1;
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initStruct->positiveInput = FL_COMP_INP_SOURCE_INP1;
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initStruct->digitalFilter = FL_ENABLE;
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initStruct->digitalFilterLen = FL_COMP_OUTPUT_FILTER_WINDOW_3APBCLK;
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}
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/**
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* @}
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*/
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#endif /* FL_COMP_DRIVER_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
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