506 lines
18 KiB
C
506 lines
18 KiB
C
/**
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*******************************************************************************************************
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* @file fm33lg0xx_fl_vrefp.h
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* @author FMSH Application Team
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* @brief Head file of VREFP FL Module
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*******************************************************************************************************
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* @attention
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*
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* Copyright (c) [2021] [Fudan Microelectronics]
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* THIS SOFTWARE is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*
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*******************************************************************************************************
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*/
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/* Define to prevent recursive inclusion---------------------------------------------------------------*/
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#ifndef __FM33LG0XX_FL_VREFP_H
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#define __FM33LG0XX_FL_VREFP_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes -------------------------------------------------------------------------------------------*/
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#include "fm33lg0xx_fl_def.h"
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/** @addtogroup FM33LG0XX_FL_Driver
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* @{
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*/
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/** @defgroup VREFP VREFP
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* @brief VREFP FL driver
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* @{
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*/
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/* Exported types -------------------------------------------------------------------------------------*/
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/** @defgroup VREFP_FL_ES_INIT VREFP Exported Init structures
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* @{
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*/
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/**
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* @brief FL VREFP Init Sturcture definition
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*/
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typedef struct
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{
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/* 输出电压的TRIM值 */
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uint32_t voltageTrim;
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/* 输出电压值 */
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uint32_t outputVoltage;
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/* VREFP输出模式 */
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uint32_t mode;
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/* 间歇模式下单次驱动时间 */
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uint32_t timeOfDriving;
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/* 间歇模式下使能周期 */
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uint32_t timeOfPeriod;
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} FL_VREFP_InitTypeDef;
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/**
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* @}
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*/
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/* Exported constants ---------------------------------------------------------------------------------*/
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/** @defgroup VREFP_FL_Exported_Constants VREFP Exported Constants
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* @{
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*/
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#define VREFP_CR_DENDIE_Pos (2U)
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#define VREFP_CR_DENDIE_Msk (0x1U << VREFP_CR_DENDIE_Pos)
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#define VREFP_CR_DENDIE VREFP_CR_DENDIE_Msk
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#define VREFP_CR_POVIE_Pos (1U)
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#define VREFP_CR_POVIE_Msk (0x1U << VREFP_CR_POVIE_Pos)
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#define VREFP_CR_POVIE VREFP_CR_POVIE_Msk
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#define VREFP_CR_EN_Pos (0U)
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#define VREFP_CR_EN_Msk (0x1U << VREFP_CR_EN_Pos)
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#define VREFP_CR_EN VREFP_CR_EN_Msk
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#define VREFP_CFGR_VRS_Pos (8U)
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#define VREFP_CFGR_VRS_Msk (0x7U << VREFP_CFGR_VRS_Pos)
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#define VREFP_CFGR_VRS VREFP_CFGR_VRS_Msk
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#define VREFP_CFGR_TPERIOD_Pos (5U)
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#define VREFP_CFGR_TPERIOD_Msk (0x7U << VREFP_CFGR_TPERIOD_Pos)
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#define VREFP_CFGR_TPERIOD VREFP_CFGR_TPERIOD_Msk
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#define VREFP_CFGR_TDRV_Pos (2U)
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#define VREFP_CFGR_TDRV_Msk (0x7U << VREFP_CFGR_TDRV_Pos)
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#define VREFP_CFGR_TDRV VREFP_CFGR_TDRV_Msk
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#define VREFP_CFGR_LPM_Pos (1U)
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#define VREFP_CFGR_LPM_Msk (0x1U << VREFP_CFGR_LPM_Pos)
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#define VREFP_CFGR_LPM VREFP_CFGR_LPM_Msk
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#define VREFP_ISR_BUSY_Pos (2U)
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#define VREFP_ISR_BUSY_Msk (0x1U << VREFP_ISR_BUSY_Pos)
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#define VREFP_ISR_BUSY VREFP_ISR_BUSY_Msk
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#define VREFP_ISR_DEND_Pos (1U)
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#define VREFP_ISR_DEND_Msk (0x1U << VREFP_ISR_DEND_Pos)
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#define VREFP_ISR_DEND VREFP_ISR_DEND_Msk
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#define VREFP_ISR_POV_Pos (0U)
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#define VREFP_ISR_POV_Msk (0x1U << VREFP_ISR_POV_Pos)
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#define VREFP_ISR_POV VREFP_ISR_POV_Msk
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#define FL_VREFP_OUTPUT_VOLTAGE_2P0V (0x0U << VREFP_CFGR_VRS_Pos)
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#define FL_VREFP_OUTPUT_VOLTAGE_2P5V (0x1U << VREFP_CFGR_VRS_Pos)
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#define FL_VREFP_OUTPUT_VOLTAGE_3P0V (0x2U << VREFP_CFGR_VRS_Pos)
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#define FL_VREFP_OUTPUT_VOLTAGE_4P5V (0x3U << VREFP_CFGR_VRS_Pos)
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#define FL_VREFP_OUTPUT_VOLTAGE_1P5V (0x4U << VREFP_CFGR_VRS_Pos)
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#define FL_VREFP_ENABLE_PERIOD_1MS (0x0U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_4MS (0x1U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_16MS (0x2U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_32MS (0x3U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_64MS (0x4U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_256MS (0x5U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_1000MS (0x6U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_ENABLE_PERIOD_4000MS (0x7U << VREFP_CFGR_TPERIOD_Pos)
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#define FL_VREFP_DRIVING_TIME_4LSCLK (0x0U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_8LSCLK (0x1U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_16LSCLK (0x2U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_32LSCLK (0x3U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_64LSCLK (0x4U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_128LSCLK (0x5U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_256LSCLK (0x6U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_DRIVING_TIME_512LSCLK (0x7U << VREFP_CFGR_TDRV_Pos)
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#define FL_VREFP_WORK_MODE_CONTINUOUS (0x0U << VREFP_CFGR_LPM_Pos)
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#define FL_VREFP_WORK_MODE_PERIODIC (0x1U << VREFP_CFGR_LPM_Pos)
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#define FL_VREFP_OUTPUT_VOLTAGE_2P0V_TRIM (*(uint32_t*)0x1FFFFA90)
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#define FL_VREFP_OUTPUT_VOLTAGE_2P5V_TRIM (*(uint32_t*)0x1FFFFA8C)
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#define FL_VREFP_OUTPUT_VOLTAGE_3P0V_TRIM (*(uint32_t*)0x1FFFFA88)
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#define FL_VREFP_OUTPUT_VOLTAGE_4P5V_TRIM (*(uint32_t*)0x1FFFFA84)
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#define FL_VREFP_OUTPUT_VOLTAGE_1P5V_TRIM (*(uint32_t*)0x1FFFFA94)
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/**
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* @}
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*/
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/* Exported functions ---------------------------------------------------------------------------------*/
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/** @defgroup VREFP_FL_Exported_Functions VREFP Exported Functions
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* @{
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*/
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/**
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* @brief Driving end interrupt enable
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* @rmtoll CR DENDIE FL_VREFP_EnableIT_DrivingEnd
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* @param VREFPx VREFP instance
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_EnableIT_DrivingEnd(VREFP_Type *VREFPx)
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{
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SET_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk);
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}
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/**
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* @brief Get Driving end interrupt enable status
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* @rmtoll CR DENDIE FL_VREFP_IsEnabledIT_DrivingEnd
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* @param VREFPx VREFP instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t FL_VREFP_IsEnabledIT_DrivingEnd(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk) == VREFP_CR_DENDIE_Msk);
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}
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/**
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* @brief Driving end interrupt disable
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* @rmtoll CR DENDIE FL_VREFP_DisableIT_DrivingEnd
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* @param VREFPx VREFP instance
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_DisableIT_DrivingEnd(VREFP_Type *VREFPx)
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{
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CLEAR_BIT(VREFPx->CR, VREFP_CR_DENDIE_Msk);
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}
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/**
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* @brief Periodic overflow interrupt enable
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* @rmtoll CR POVIE FL_VREFP_EnableIT_EndOfPeriod
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* @param VREFPx VREFP instance
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_EnableIT_EndOfPeriod(VREFP_Type *VREFPx)
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{
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SET_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk);
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}
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/**
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* @brief Get Periodic overflow interrupt enable status
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* @rmtoll CR POVIE FL_VREFP_IsEnabledIT_EndOfPeriod
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* @param VREFPx VREFP instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t FL_VREFP_IsEnabledIT_EndOfPeriod(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk) == VREFP_CR_POVIE_Msk);
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}
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/**
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* @brief Periodic overflow interrupt disable
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* @rmtoll CR POVIE FL_VREFP_DisableIT_EndOfPeriod
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* @param VREFPx VREFP instance
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_DisableIT_EndOfPeriod(VREFP_Type *VREFPx)
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{
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CLEAR_BIT(VREFPx->CR, VREFP_CR_POVIE_Msk);
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}
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/**
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* @brief VREFP_VREG enable
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* @rmtoll CR EN FL_VREFP_Enable
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* @param VREFPx VREFP instance
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_Enable(VREFP_Type *VREFPx)
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{
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SET_BIT(VREFPx->CR, VREFP_CR_EN_Msk);
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}
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/**
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* @brief Get VREFP_VREG enable status
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* @rmtoll CR EN FL_VREFP_IsEnabled
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* @param VREFPx VREFP instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t FL_VREFP_IsEnabled(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CR, VREFP_CR_EN_Msk) == VREFP_CR_EN_Msk);
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}
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/**
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* @brief VREFP_VREG disable
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* @rmtoll CR EN FL_VREFP_Disable
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* @param VREFPx VREFP instance
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_Disable(VREFP_Type *VREFPx)
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{
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CLEAR_BIT(VREFPx->CR, VREFP_CR_EN_Msk);
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}
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/**
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* @brief Set output voltage
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* @rmtoll CFGR VRS FL_VREFP_SetOutputVoltage
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* @param VREFPx VREFP instance
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* @param voltage This parameter can be one of the following values:
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P0V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P5V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_3P0V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_4P5V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_1P5V
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_SetOutputVoltage(VREFP_Type *VREFPx, uint32_t voltage)
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{
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MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_VRS_Msk, voltage);
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}
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/**
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* @brief Get output voltage
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* @rmtoll CFGR VRS FL_VREFP_GetOutputVoltage
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* @param VREFPx VREFP instance
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* @retval Returned value can be one of the following values:
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P0V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_2P5V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_3P0V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_4P5V
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* @arg @ref FL_VREFP_OUTPUT_VOLTAGE_1P5V
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*/
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__STATIC_INLINE uint32_t FL_VREFP_GetOutputVoltage(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_VRS_Msk));
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}
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/**
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* @brief Set period time on low power mode
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* @rmtoll CFGR TPERIOD FL_VREFP_SetEnablePeriod
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* @param VREFPx VREFP instance
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* @param period This parameter can be one of the following values:
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* @arg @ref FL_VREFP_ENABLE_PERIOD_1MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_4MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_16MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_32MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_64MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_256MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_1000MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_4000MS
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_SetEnablePeriod(VREFP_Type *VREFPx, uint32_t period)
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{
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MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_TPERIOD_Msk, period);
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}
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/**
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* @brief Get period time on low power mode
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* @rmtoll CFGR TPERIOD FL_VREFP_GetEnablePeriod
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* @param VREFPx VREFP instance
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* @retval Returned value can be one of the following values:
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* @arg @ref FL_VREFP_ENABLE_PERIOD_1MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_4MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_16MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_32MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_64MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_256MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_1000MS
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* @arg @ref FL_VREFP_ENABLE_PERIOD_4000MS
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*/
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__STATIC_INLINE uint32_t FL_VREFP_GetEnablePeriod(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_TPERIOD_Msk));
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}
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/**
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* @brief Set driving time on low power mode
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* @rmtoll CFGR TDRV FL_VREFP_SetDrivingTime
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* @param VREFPx VREFP instance
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* @param time This parameter can be one of the following values:
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* @arg @ref FL_VREFP_DRIVING_TIME_4LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_8LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_16LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_32LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_64LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_128LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_256LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_512LSCLK
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_SetDrivingTime(VREFP_Type *VREFPx, uint32_t time)
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{
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MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_TDRV_Msk, time);
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}
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/**
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* @brief Get driving time on low power mode
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* @rmtoll CFGR TDRV FL_VREFP_GetDrivingTime
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* @param VREFPx VREFP instance
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* @retval Returned value can be one of the following values:
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* @arg @ref FL_VREFP_DRIVING_TIME_4LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_8LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_16LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_32LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_64LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_128LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_256LSCLK
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* @arg @ref FL_VREFP_DRIVING_TIME_512LSCLK
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*/
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__STATIC_INLINE uint32_t FL_VREFP_GetDrivingTime(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_TDRV_Msk));
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}
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/**
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* @brief Low power mode enable
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* @rmtoll CFGR LPM FL_VREFP_SetWorkMode
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* @param VREFPx VREFP instance
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* @param mode This parameter can be one of the following values:
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* @arg @ref FL_VREFP_WORK_MODE_CONTINUOUS
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* @arg @ref FL_VREFP_WORK_MODE_PERIODIC
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* @retval None
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*/
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__STATIC_INLINE void FL_VREFP_SetWorkMode(VREFP_Type *VREFPx, uint32_t mode)
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{
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MODIFY_REG(VREFPx->CFGR, VREFP_CFGR_LPM_Msk, mode);
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}
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/**
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* @brief Get low power mode enablestatus
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* @rmtoll CFGR LPM FL_VREFP_GetWorkMode
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* @param VREFPx VREFP instance
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* @retval Returned value can be one of the following values:
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* @arg @ref FL_VREFP_WORK_MODE_CONTINUOUS
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* @arg @ref FL_VREFP_WORK_MODE_PERIODIC
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*/
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__STATIC_INLINE uint32_t FL_VREFP_GetWorkMode(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->CFGR, VREFP_CFGR_LPM_Msk));
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}
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/**
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* @brief Get Driving busy flag
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* @rmtoll ISR BUSY FL_VREFP_IsActiveFlag_DrivingBusy
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* @param VREFPx VREFP instance
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* @retval State of bit (1 or 0).
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*/
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__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_DrivingBusy(VREFP_Type *VREFPx)
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{
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return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_BUSY_Msk) == (VREFP_ISR_BUSY_Msk));
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}
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/**
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* @brief Get Driving end flag
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* @rmtoll ISR DEND FL_VREFP_IsActiveFlag_DrivingEnd
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* @param VREFPx VREFP instance
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* @retval State of bit (1 or 0).
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|
*/
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__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_DrivingEnd(VREFP_Type *VREFPx)
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|
{
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return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_DEND_Msk) == (VREFP_ISR_DEND_Msk));
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}
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/**
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* @brief Clear Driving end flag
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* @rmtoll ISR DEND FL_VREFP_ClearFlag_DrivingEnd
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* @param VREFPx VREFP instance
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|
* @retval None
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|
*/
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__STATIC_INLINE void FL_VREFP_ClearFlag_DrivingEnd(VREFP_Type *VREFPx)
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|
{
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|
WRITE_REG(VREFPx->ISR, VREFP_ISR_DEND_Msk);
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}
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|
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/**
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* @brief Get periodic overflow flag
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|
* @rmtoll ISR POV FL_VREFP_IsActiveFlag_EndOfPeriod
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|
* @param VREFPx VREFP instance
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|
* @retval State of bit (1 or 0).
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|
*/
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__STATIC_INLINE uint32_t FL_VREFP_IsActiveFlag_EndOfPeriod(VREFP_Type *VREFPx)
|
|
{
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|
return (uint32_t)(READ_BIT(VREFPx->ISR, VREFP_ISR_POV_Msk) == (VREFP_ISR_POV_Msk));
|
|
}
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|
|
|
/**
|
|
* @brief Clear periodic overflow flag
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|
* @rmtoll ISR POV FL_VREFP_ClearFlag_EndOfPeriod
|
|
* @param VREFPx VREFP instance
|
|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void FL_VREFP_ClearFlag_EndOfPeriod(VREFP_Type *VREFPx)
|
|
{
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|
WRITE_REG(VREFPx->ISR, VREFP_ISR_POV_Msk);
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|
}
|
|
|
|
/**
|
|
* @brief Set VREFP output voltage
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|
* @rmtoll TR FL_VREFP_WriteOutputVoltageTrim
|
|
* @param VREFPx VREFP instance
|
|
* @param voltage
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|
* @retval None
|
|
*/
|
|
__STATIC_INLINE void FL_VREFP_WriteOutputVoltageTrim(VREFP_Type *VREFPx, uint32_t voltage)
|
|
{
|
|
MODIFY_REG(VREFPx->TR, (0xffU << 0U), (voltage << 0U));
|
|
}
|
|
|
|
/**
|
|
* @brief Get VREFP output voltage
|
|
* @rmtoll TR FL_VREFP_ReadOutputVoltageTrim
|
|
* @param VREFPx VREFP instance
|
|
* @retval
|
|
*/
|
|
__STATIC_INLINE uint32_t FL_VREFP_ReadOutputVoltageTrim(VREFP_Type *VREFPx)
|
|
{
|
|
return (uint32_t)(READ_BIT(VREFPx->TR, (0xffU << 0U)) >> 0U);
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup VREFP_FL_EF_Init Initialization and de-initialization functions
|
|
* @{
|
|
*/
|
|
FL_ErrorStatus FL_VREFP_Init(VREFP_Type *VREFPx, FL_VREFP_InitTypeDef *VREFP_InitStruct);
|
|
void FL_VREFP_StructInit(FL_VREFP_InitTypeDef *VREFP_InitStruct);
|
|
FL_ErrorStatus FL_VREFP_DeInit(VREFP_Type *VREFPx);
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __FM33LG0XX_FL_VREFP_H*/
|
|
|
|
/*************************Py_Code_Generator Version: 0.1-0.14-0.1 @ 2021-06-25*************************/
|
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/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
|