282 lines
11 KiB
C
282 lines
11 KiB
C
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/**
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****************************************************************************************************
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* @file fm33lg0xx_fl_lpuart.c
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* @author FMSH Application Team
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* @brief Src file of LPUART FL Module
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****************************************************************************************************
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* @attention
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*
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* Copyright (c) [2021] [Fudan Microelectronics]
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* THIS SOFTWARE is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*
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****************************************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "fm33lg0xx_fl.h"
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/** @addtogroup FM33LG0XX_FL_Driver
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* @{
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*/
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/** @addtogroup LPUART
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* @{
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*/
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#ifdef FL_LPUART_DRIVER_ENABLED
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/* Private macros ------------------------------------------------------------*/
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/** @addtogroup LPUART_FL_Private_Macros
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* @{
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*/
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#define IS_LPUART_INSTANCE(INSTANCE) (((INSTANCE) == LPUART0)||\
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((INSTANCE) == LPUART1)||\
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((INSTANCE) == LPUART2))
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#define IS_FL_LPUART_CLKSRC(__VALUE__) (((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_LSCLK)||\
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((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_RCHF)||\
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((__VALUE__) == FL_CMU_LPUART_CLK_SOURCE_RCLF))
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#define IS_FL_LPUART_BAUDRATE(__VALUE__) (((__VALUE__) == FL_LPUART_BAUDRATE_300)||\
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((__VALUE__) == FL_LPUART_BAUDRATE_600)||\
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((__VALUE__) == FL_LPUART_BAUDRATE_1200)||\
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((__VALUE__) == FL_LPUART_BAUDRATE_2400)||\
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((__VALUE__) == FL_LPUART_BAUDRATE_4800)||\
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((__VALUE__) == FL_LPUART_BAUDRATE_9600))
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#define IS_FL_LPUART_DATAWIDTH(__VALUE__) (((__VALUE__) == FL_LPUART_DATA_WIDTH_6B)||\
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((__VALUE__) == FL_LPUART_DATA_WIDTH_7B)||\
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((__VALUE__) == FL_LPUART_DATA_WIDTH_8B)||\
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((__VALUE__) == FL_LPUART_DATA_WIDTH_9B))
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#define IS_FL_LPUART_STOPBITS(__VALUE__) (((__VALUE__) == FL_LPUART_STOP_BIT_WIDTH_1B)||\
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((__VALUE__) == FL_LPUART_STOP_BIT_WIDTH_2B))
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#define IS_FL_LPUART_PARITY(__VALUE__) (((__VALUE__) == FL_LPUART_PARITY_NONE)||\
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((__VALUE__) == FL_LPUART_PARITY_EVEN)||\
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((__VALUE__) == FL_LPUART_PARITY_ODD))
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#define IS_FL_LPUART_DIRECTION(__VALUE__) (((__VALUE__) == FL_LPUART_DIRECTION_NONE)||\
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((__VALUE__) == FL_LPUART_DIRECTION_RX)||\
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((__VALUE__) == FL_LPUART_DIRECTION_TX)||\
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((__VALUE__) == FL_LPUART_DIRECTION_TX_RX))
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup LPUART_FL_EF_Init
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* @{
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*/
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/**
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* @brief 复位LPUART 外设
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* @param 外设入口地址
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* @retval 返回错误状态，可能值：
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* -FL_PASS 外设寄存器值恢复复位值
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* -FL_FAIL 未成功执行
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*/
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FL_ErrorStatus FL_LPUART_DeInit(LPUART_Type *LPUARTx)
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{
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FL_ErrorStatus status = FL_PASS;
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/* 入口参数合法性断言 */
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assert_param(IS_LPUART_INSTANCE(LPUARTx));
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/* 外设复位使能 */
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FL_RMU_EnablePeripheralReset(RMU);
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if(LPUARTx == LPUART0)
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{
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/*复位LPUART*/
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FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART0);
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FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART0);
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/* 外设总线时钟关闭 */
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FL_CMU_IsEnabledGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART0);
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/* 外设工作时钟关闭 */
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FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART0);
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}
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else
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if(LPUARTx == LPUART1)
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{
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/*复位LPUART*/
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FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART1);
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FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART1);
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/* 外设总线时钟关闭 */
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FL_CMU_IsEnabledGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART1);
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/* 外设工作时钟关闭 */
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FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART1);
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}
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else
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if(LPUARTx == LPUART2)
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{
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/*复位LPUART*/
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FL_RMU_EnableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART2);
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FL_RMU_DisableResetAPBPeripheral(RMU, FL_RMU_RSTAPB_LPUART2);
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/* 外设总线时钟关闭 */
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FL_CMU_IsEnabledGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART2);
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/* 外设工作时钟关闭 */
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FL_CMU_DisableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART2);
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}
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else
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{
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status = FL_FAIL;
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}
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/* 锁定外设复位功能 */
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FL_RMU_DisablePeripheralReset(RMU);
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return (status);
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}
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/**
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* @brief 根据需要功能配置LPUART寄存器
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*
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* @note 波特率调制寄存器中的MCTL值，默认为工作时钟为32768Hz的频率下的调制值，用户如果外设工作时钟不是此前
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* 提则可能需要手动调整这个寄存器的值，以达到更好的通信效果。
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* @param LPUARTx 外设入口地址
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* @param initStruct 指向一个 @ref FL_LPUART_InitTypeDef类型的结构体，它包含指定LPUART外设的配置信息
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*
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* @retval ErrorStatus枚举值
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* -FL_FAIL 配置过程发生错误
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* -FL_PASS LPUART配置成功
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*/
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FL_ErrorStatus FL_LPUART_Init(LPUART_Type *LPUARTx, FL_LPUART_InitTypeDef *initStruct)
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{
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FL_ErrorStatus status = FL_FAIL;
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uint16_t MCTLVel;
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/* 参数合法性检查 */
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assert_param(IS_LPUART_INSTANCE(LPUARTx));
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assert_param(IS_FL_LPUART_CLKSRC(initStruct->clockSrc));
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assert_param(IS_FL_LPUART_BAUDRATE(initStruct->baudRate));
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assert_param(IS_FL_LPUART_DATAWIDTH(initStruct->dataWidth));
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assert_param(IS_FL_LPUART_STOPBITS(initStruct->stopBits));
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assert_param(IS_FL_LPUART_PARITY(initStruct->parity));
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assert_param(IS_FL_LPUART_DIRECTION(initStruct->transferDirection));
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if(LPUARTx == LPUART0)
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{
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/*总线时钟使能*/
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FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART0);
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/*操作时钟使能*/
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FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART0);
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/*时钟源选择*/
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FL_CMU_SetLPUART0ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART0CKS_Pos);
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}
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else
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if(LPUARTx == LPUART1)
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{
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/*总线时钟使能*/
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FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART1);
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/*操作时钟使能*/
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FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART1);
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/*时钟源选择*/
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FL_CMU_SetLPUART1ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART1CKS_Pos);
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}
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else
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{
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/*总线时钟使能*/
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FL_CMU_EnableGroup3BusClock(FL_CMU_GROUP3_BUSCLK_LPUART2);
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/*操作时钟使能*/
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FL_CMU_EnableGroup3OperationClock(FL_CMU_GROUP3_OPCLK_LPUART2);
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/*时钟源选择*/
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FL_CMU_SetLPUART2ClockSource(initStruct->clockSrc << CMU_OPCCR1_LPUART2CKS_Pos);
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}
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if(initStruct->clockSrc == FL_CMU_LPUART_CLK_SOURCE_RCLF)//RCLF时钟
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{
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FL_CMU_RCLF_SetPrescaler(FL_CMU_RCLF_PSC_DIV16);
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FL_CMU_RCLF_Enable();
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FL_LPUART_DisableBaudRateModulation(LPUARTx);
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}
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else
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{
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FL_LPUART_EnableBaudRateModulation(LPUARTx);
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}
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/*发送接收配置*/
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if(initStruct->transferDirection & FL_LPUART_DIRECTION_TX)
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{
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do
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{
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FL_LPUART_EnableTX(LPUARTx);
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} while(FL_LPUART_IsEnabledTX(LPUARTx) != FL_SET);
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}
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if(initStruct->transferDirection & FL_LPUART_DIRECTION_RX)
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{
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do
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{
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FL_LPUART_EnableRX(LPUARTx);
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} while(FL_LPUART_IsEnabledRX(LPUARTx) != FL_SET);
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}
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/*配置波特率*/
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FL_LPUART_SetBaudRate(LPUARTx, initStruct->baudRate);
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/*配置停止位*/
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FL_LPUART_SetStopBitsWidth(LPUARTx, initStruct->stopBits);
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/*配置数据位宽*/
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FL_LPUART_SetDataWidth(LPUARTx, initStruct->dataWidth);
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/*配置波特率*/
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FL_LPUART_SetParity(LPUARTx, initStruct->parity);
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/*根据波特率配置MCTL值*/
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switch(initStruct->baudRate)
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{
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case FL_LPUART_BAUDRATE_9600:
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MCTLVel = 0x0552;
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break;
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case FL_LPUART_BAUDRATE_4800:
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MCTLVel = 0x1EFB;
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break;
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case FL_LPUART_BAUDRATE_2400:
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MCTLVel = 0x16DB;
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break;
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case FL_LPUART_BAUDRATE_1200:
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MCTLVel = 0x0492;
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break;
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case FL_LPUART_BAUDRATE_600:
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MCTLVel = 0x16D6;
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break;
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case FL_LPUART_BAUDRATE_300:
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MCTLVel = 0x0842;
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break;
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default:
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MCTLVel = 0x0552;
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break;
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}
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FL_LPUART_WriteBitModulation(LPUARTx, MCTLVel);
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status = FL_PASS;
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return status;
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}
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/**
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* @brief initStruct 为默认配置
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* @param initStruct 指向需要将值设置为默认配置的结构体 @ref FL_LPUART_InitTypeDef structure
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* 结构体
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* @retval None
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*/
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void FL_LPUART_StructInit(FL_LPUART_InitTypeDef *initStruct)
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{
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initStruct->baudRate = FL_LPUART_BAUDRATE_9600;
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initStruct->dataWidth = FL_LPUART_DATA_WIDTH_8B;
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initStruct->stopBits = FL_LPUART_STOP_BIT_WIDTH_1B;
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initStruct->parity = FL_LPUART_PARITY_NONE ;
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initStruct->transferDirection = FL_LPUART_DIRECTION_TX_RX;
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initStruct->clockSrc = FL_CMU_LPUART_CLK_SOURCE_LSCLK;
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}
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/**
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* @}
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*/
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#endif /* FL_LPUART_DRIVER_ENABLED */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*************************(C) COPYRIGHT Fudan Microelectronics **** END OF FILE*************************/
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