262 lines
10 KiB
C
262 lines
10 KiB
C
|
|
/* USER CODE BEGIN Header */
|
|||
|
|
/**
|
|||
|
|
******************************************************************************
|
|||
|
|
* @file : 8f_5aw_display.h
|
|||
|
|
* @brief : 8f-5aw<EFBFBD><EFBFBD>ʾ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>оƬ
|
|||
|
|
* @version : 1.0
|
|||
|
|
* @changelog : version 1.0 <EFBFBD><EFBFBD>ʼ<EFBFBD>汾 2026.1.8
|
|||
|
|
******************************************************************************
|
|||
|
|
* @attention
|
|||
|
|
*
|
|||
|
|
* Copyright (c) 2025 Yuwell Software Danyang.Jiangsu.China
|
|||
|
|
* THIS SOFTWARE is licensed under the Mulan PSL v1.
|
|||
|
|
* can use this software according to the terms and conditions of the Mulan PSL v1.
|
|||
|
|
* You may obtain a copy of Mulan PSL v1 at:
|
|||
|
|
* http://license.coscl.org.cn/MulanPSL
|
|||
|
|
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR
|
|||
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR
|
|||
|
|
* PURPOSE.
|
|||
|
|
* See the Mulan PSL v1 for more details.
|
|||
|
|
*
|
|||
|
|
******************************************************************************
|
|||
|
|
*/
|
|||
|
|
/* USER CODE END Header */
|
|||
|
|
|
|||
|
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
|||
|
|
#ifndef __8F_5AW_DISPLAY_H
|
|||
|
|
#define __8F_5AW_DISPLAY_H
|
|||
|
|
|
|||
|
|
#ifdef __cplusplus
|
|||
|
|
extern "C" {
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
#include <stdint.h>
|
|||
|
|
#include "mf_config.h"
|
|||
|
|
#include "string.h"
|
|||
|
|
|
|||
|
|
|
|||
|
|
/************************** Ӳ<><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3> **************************/
|
|||
|
|
// <20><>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ض<EFBFBD><D8B6><EFBFBD>
|
|||
|
|
#define BL55072A_SCL_GPIO_PORT GPIOD
|
|||
|
|
#define BL55072A_SCL_GPIO_PIN FL_GPIO_PIN_2
|
|||
|
|
#define BL55072A_SDA_GPIO_PORT GPIOD
|
|||
|
|
#define BL55072A_SDA_GPIO_PIN FL_GPIO_PIN_3
|
|||
|
|
|
|||
|
|
|
|||
|
|
/************************** <20>꺯<EFBFBD><EABAAF><EFBFBD><EFBFBD><EFBFBD><EFBFBD> *************************/
|
|||
|
|
#define BL55072A_SDA_CLEAR() FL_GPIO_ResetOutputPin(BL55072A_SDA_GPIO_PORT,BL55072A_SDA_GPIO_PIN);
|
|||
|
|
#define BL55072A_SDA_SET() FL_GPIO_SetOutputPin(BL55072A_SDA_GPIO_PORT,BL55072A_SDA_GPIO_PIN);
|
|||
|
|
|
|||
|
|
#define BL55072A_SCL_CLEAR() FL_GPIO_ResetOutputPin(BL55072A_SCL_GPIO_PORT,BL55072A_SCL_GPIO_PIN);
|
|||
|
|
#define BL55072A_SCL_SET() FL_GPIO_SetOutputPin(BL55072A_SCL_GPIO_PORT,BL55072A_SCL_GPIO_PIN);
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
/************************** <20><>ʾоƬ<D0BE><C6AC><EFBFBD><EFBFBD> **************************/
|
|||
|
|
#define BL55072A_I2C_ADDR_R 0x7D
|
|||
|
|
#define BL55072A_I2C_ADDR_W 0x7C
|
|||
|
|
|
|||
|
|
|
|||
|
|
#define BL55072A_DISP_BUF_SIZE 18 // <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
|
|||
|
|
|
|||
|
|
|
|||
|
|
// 1. ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> MODESET (Bit7=C=1 <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>C=0<><30>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
|
|||
|
|
#define MODESET_BASIC 0xC0 // Bit7=C=1, Bit6=1, Bit5=0<><30><EFBFBD>̶<EFBFBD><CCB6><EFBFBD>ʽ<EFBFBD><CABD>
|
|||
|
|
#define MODESET_DISP_OFF 0x00 // Bit3=0<><30><EFBFBD><EFBFBD>ʾ<EFBFBD>رգ<D8B1>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define MODESET_DISP_ON 0x08 // Bit3=1<><31><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
|||
|
|
#define MODESET_BIAS_1_3 0x00 // Bit2=0<><30>1/3ƫ<33>ã<EFBFBD>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define MODESET_BIAS_1_2 0x04 // Bit2=1<><31>1/2ƫ<32><C6AB>
|
|||
|
|
#define BL55072A_CMD_MODESET (MODESET_BASIC | MODESET_DISP_ON | MODESET_BIAS_1_3)
|
|||
|
|
|
|||
|
|
|
|||
|
|
// 2. <20><>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADSET
|
|||
|
|
#define BL55072A_CMD_ADSET 0x00 // Bit7=C=0, Bit6=0, Bit5=0 <20>·<EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD>
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
// 3. <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> DISCTL
|
|||
|
|
#define DISCTL_BASIC 0xA0 // Bit7=C=1, Bit6=0<><30><EFBFBD>̶<EFBFBD><CCB6><EFBFBD>ʽ<EFBFBD><CABD>
|
|||
|
|
// ֡Ƶѡ<C6B5><D1A1><EFBFBD><EFBFBD>Bit4~Bit3<74><33>
|
|||
|
|
#define DISCTL_FR_80HZ 0x00 // 00<30><30>80Hz<48><7A>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define DISCTL_FR_71HZ 0x08 // 01<30><31>71Hz
|
|||
|
|
#define DISCTL_FR_64HZ 0x10 // 10<31><30>64Hz
|
|||
|
|
#define DISCTL_FR_53HZ 0x18 // 11<31><31>53Hz
|
|||
|
|
// <20><><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>Bit2<74><32>
|
|||
|
|
#define DISCTL_DM_LINE_INV 0x00 // 0<><30><EFBFBD>з<EFBFBD>תģʽ<C4A3><CABD>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define DISCTL_DM_FRAME_INV 0x04 // 1<><31>֡<EFBFBD><D6A1>תģʽ
|
|||
|
|
// ʡ<><CAA1>ģʽ<C4A3><CABD>Bit1~Bit0<74><30>
|
|||
|
|
#define DISCTL_SR_MODE1 0x00 // 00<30><30>ʡ<EFBFBD><CAA1>ģʽ1
|
|||
|
|
#define DISCTL_SR_MODE2 0x01 // 01<30><31>ʡ<EFBFBD><CAA1>ģʽ2
|
|||
|
|
#define DISCTL_SR_NORMAL 0x02 // 10<31><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define DISCTL_SR_HIGH_POWER 0x03 // 11<31><31><EFBFBD>߹<EFBFBD><DFB9><EFBFBD>ģʽ
|
|||
|
|
#define BL55072A_CMD_DISCTL (DISCTL_BASIC | DISCTL_FR_80HZ | DISCTL_DM_LINE_INV |DISCTL_SR_NORMAL)
|
|||
|
|
|
|||
|
|
|
|||
|
|
// 4. оƬ<D0BE><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ICSET
|
|||
|
|
#define ICSET_BASIC 0xE0 // Bit7=C=1, Bit6=1, Bit5=1<><31><EFBFBD>̶<EFBFBD><CCB6><EFBFBD>ʽ<EFBFBD><CABD>
|
|||
|
|
#define ICSET_SOFT_RST_DIS 0x00 // Bit1=0<><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD>رգ<D8B1>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define ICSET_SOFT_RST_EN 0x02 // Bit1=1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λʹ<CEBB><CAB9>
|
|||
|
|
#define ICSET_OSC_INNER 0x00 // Bit0=0<><30><EFBFBD>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϣ<EFBFBD>OSCIO<49><4F>VSS<53><53>
|
|||
|
|
#define ICSET_OSC_OUTER 0x01 // Bit0=1<><31><EFBFBD>ⲿ<EFBFBD><E2B2BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>OSCIO<49><4F><EFBFBD>ⲿʱ<E2B2BF>ӣ<EFBFBD>
|
|||
|
|
#define BL55072A_CMD_ICSET (ICSET_BASIC | ICSET_SOFT_RST_DIS |ICSET_OSC_INNER)
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
// 5. <20><>˸<EFBFBD><CBB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> BLKCTL
|
|||
|
|
#define BLKCTL_BASIC 0xF0 // Bit7=C=1, Bit6=1, Bit5=1, Bit4=1<><31><EFBFBD>̶<EFBFBD><CCB6><EFBFBD>ʽ<EFBFBD><CABD>
|
|||
|
|
#define BLKCTL_OFF 0x00 // 000<30><30><EFBFBD><EFBFBD>˸<EFBFBD>رգ<D8B1>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define BLKCTL_0_5HZ 0x01 // 001<30><31>0.5Hz<EFBFBD><EFBFBD>˸
|
|||
|
|
#define BLKCTL_1HZ 0x02 // 010<31><30>1Hz<48><7A>˸
|
|||
|
|
#define BLKCTL_2HZ 0x03 // 011<31><31>2Hz<48><7A>˸
|
|||
|
|
#define BLKCTL_0_3HZ 0x04 // 100<30><30>0.3Hz<EFBFBD><EFBFBD>˸<EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD>Ϊ0.3s<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲᶨ<EFBFBD>壩
|
|||
|
|
#define BLKCTL_0_2HZ 0x05 // 101<30><31>0.2Hz<EFBFBD><EFBFBD>˸<EFBFBD><EFBFBD><EFBFBD>ֲ<EFBFBD>Ϊ0.2s<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲᶨ<EFBFBD>壩
|
|||
|
|
#define BL55072A_CMD_BLKCTL (BLKCTL_BASIC | BLKCTL_OFF)
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
// 6. ȫ<>Կ<EFBFBD><D4BF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> APCTL
|
|||
|
|
#define APCTL_BASIC 0xFC // Bit7=C=1, Bit6=1, Bit5=1, Bit4=1, Bit3=1, Bit2=1<><31><EFBFBD>̶<EFBFBD><CCB6><EFBFBD>ʽ<EFBFBD><CABD>
|
|||
|
|
#define APCTL_NORMAL 0x00 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>Ĭ<EFBFBD>ϣ<EFBFBD>
|
|||
|
|
#define APCTL_ALL_ON 0x02 // Bit1=1<><31>ȫ<EFBFBD><C8AB>
|
|||
|
|
#define APCTL_ALL_OFF 0x01 // Bit0=1<><31>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD>
|
|||
|
|
#define BL55072A_CMD_APCTL (APCTL_BASIC | APCTL_NORMAL)
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
/************************** ԭ<><D4AD>ͼSEG<45><47>ַ<EFBFBD><D6B7>Һ<EFBFBD><D2BA><EFBFBD><EFBFBD>SEG˳<47><CBB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD> **************************/
|
|||
|
|
|
|||
|
|
#define TIMER_FIRST8_AFED_SEG_NUM (30) // <20><>ʱ<EFBFBD><CAB1><EFBFBD>ֵ<EFBFBD>һ<EFBFBD><D2BB>8 AFED<45><44> <20><><EFBFBD><EFBFBD>SEG
|
|||
|
|
#define TIMER_FIRST8_BGC_SEG_NUM (29)
|
|||
|
|
|
|||
|
|
#define TIMER_SECOND8_AFED_SEG_NUM (28)
|
|||
|
|
#define TIMER_SECOND8_BGC_SEG_NUM (27)
|
|||
|
|
|
|||
|
|
#define TIMER_THIRD8_AFED_SEG_NUM (26)
|
|||
|
|
#define TIMER_THIRD8_BGC_SEG_NUM (25)
|
|||
|
|
|
|||
|
|
#define TIMER_FOURTH8_AFED_SEG_NUM (18)
|
|||
|
|
#define TIMER_FOURTH8_BGC_SEG_NUM (17)
|
|||
|
|
|
|||
|
|
#define TIME_FIRST8_AFED_SEG_NUM (16) // <20><>ʱ<EFBFBD><CAB1><EFBFBD>ֵ<EFBFBD>һ<EFBFBD><D2BB>8 AFED<45><44> <20><><EFBFBD><EFBFBD>SEG
|
|||
|
|
#define TIME_FIRST8_BGC_SEG_NUM (15)
|
|||
|
|
|
|||
|
|
#define TIME_SECOND8_AFED_SEG_NUM (14)
|
|||
|
|
#define TIME_SECOND8_BGC_SEG_NUM (13)
|
|||
|
|
|
|||
|
|
#define TIME_THIRD8_AFED_SEG_NUM (12)
|
|||
|
|
#define TIME_THIRD8_BGC_SG_NUM (11)
|
|||
|
|
|
|||
|
|
#define TIME_FOURTH8_AFED_SEG_NUM (10)
|
|||
|
|
#define TIME_FOURTH8_BGC_SEG_NUM (9)
|
|||
|
|
|
|||
|
|
#define TIME_FIFTH8_AFED_SEG_NUM (8)
|
|||
|
|
#define TIME_FIFTH8_BGC_SEG_NUM (7)
|
|||
|
|
|
|||
|
|
#define ERROR_FIRT8_AFED_SEG_NUM (31) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE>һ<EFBFBD><D2BB>8
|
|||
|
|
#define ERROR_FIRT8_BGC_SEG_NUM (32)
|
|||
|
|
|
|||
|
|
#define ERROR_SECOND8_AFED_SEG_NUM (33)
|
|||
|
|
#define ERROR_SECOND8_BGC_SEG_NUM (34)
|
|||
|
|
|
|||
|
|
#define OXG_FIRST8_AFED_SEG_NUM (35) // <20><>Ũ<EFBFBD>ȵ<EFBFBD>һ<EFBFBD><D2BB>8 AFED<45><44> <20><><EFBFBD><EFBFBD>SEG
|
|||
|
|
#define OXG_FIRST8_BGC_SEG_NUM (0)
|
|||
|
|
|
|||
|
|
#define OXG_SECOND8_AFED_SEG_NUM (1)
|
|||
|
|
#define OXG_SECOND8_BGC_SEG_NUM (2)
|
|||
|
|
|
|||
|
|
#define OXG_THIRD8_AFED_SEG_NUM (3)
|
|||
|
|
#define OXG_THIRD8_BGC_SG_NUM (4)
|
|||
|
|
|
|||
|
|
#define ADDITION_SEG_POS (0x08) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>
|
|||
|
|
|
|||
|
|
#define TIMER_COL_ARRAY_INDEX (13)
|
|||
|
|
#define TIMER_H1_ARRAY_INDEX (8)
|
|||
|
|
#define TOTAL_TIME_H2_ARRAY_INDEX (3)
|
|||
|
|
#define OXG_S1_ARRAY_INDEX (17)
|
|||
|
|
#define OXG_POINT_ARRAY_INDEX (1)
|
|||
|
|
#define OXG_PERCEENET_ARRAY_INDEX (2)
|
|||
|
|
|
|||
|
|
|
|||
|
|
/************************** <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD>嶨<EFBFBD><E5B6A8> **************************/
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD>Ƶ<EFBFBD>״̬ö<CCAC><C3B6>
|
|||
|
|
typedef enum
|
|||
|
|
{
|
|||
|
|
LIGHT_OFF = 0, // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵΪ0
|
|||
|
|
LIGHT_ON = 1 // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵΪ1
|
|||
|
|
}LightState;
|
|||
|
|
|
|||
|
|
// <20><><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾģʽ
|
|||
|
|
typedef enum
|
|||
|
|
{
|
|||
|
|
MODE_TOTAL_TIME, // <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8<EFBFBD><38><EFBFBD><EFBFBD>total_time<6D><65>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾH<CABE><48><EFBFBD><EFBFBD>ʱ
|
|||
|
|
MODE_INDEX // <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>8ʹ<38><CAB9>index<65><78>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾH <20><><EFBFBD><EFBFBD><EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ʾHello
|
|||
|
|
|
|||
|
|
}Time_Mode;
|
|||
|
|
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ý<EFBFBD><C3BD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD>ݵĽṹ<C4BD><E1B9B9>
|
|||
|
|
typedef struct
|
|||
|
|
{
|
|||
|
|
struct
|
|||
|
|
{
|
|||
|
|
uint8_t hours; // <20><>ʱСʱ<D0A1><CAB1>
|
|||
|
|
uint8_t minutes; // <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
|
|||
|
|
LightState is_light; // <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD> <20><><EFBFBD>ڿ<EFBFBD><DABF>ƶ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD>ʾ
|
|||
|
|
}timer;
|
|||
|
|
|
|||
|
|
struct
|
|||
|
|
{
|
|||
|
|
Time_Mode time_mode; // <20><>ʾ<EFBFBD><CABE>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>HELLO MODE_TOTAL_TIME<4D><45>ʾ<EFBFBD><CABE>ʱ MODE_INDEX<45><58><EFBFBD>ڰ<EFBFBD><DAB0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5>ʾ
|
|||
|
|
|
|||
|
|
uint32_t hours; // <20><>ʱСʱ<D0A1><CAB1>
|
|||
|
|
|
|||
|
|
uint8_t first8_segtable_index; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><D2BB>8<EFBFBD><38>ʾ<EFBFBD><CABE><EFBFBD>ݶ<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
uint8_t second8_segtable_index;
|
|||
|
|
uint8_t third8_segtable_index;
|
|||
|
|
uint8_t fourth8_segtable_index;
|
|||
|
|
uint8_t fifth8_segtable_index; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҵ<EFBFBD><D2B5><EFBFBD><EFBFBD><EFBFBD>8 <20><>ʾ<EFBFBD><CABE><EFBFBD>ݶ<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
|
|||
|
|
LightState is_light; // <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
|||
|
|
}total_time;
|
|||
|
|
|
|||
|
|
struct
|
|||
|
|
{
|
|||
|
|
uint8_t first8_segtable_index; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҵ<EFBFBD>1<EFBFBD><31>8 <20><>ʾ<EFBFBD><CABE><EFBFBD>ݶ<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
uint8_t second8_segtable_index;
|
|||
|
|
|
|||
|
|
LightState is_light; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
|||
|
|
}error;
|
|||
|
|
|
|||
|
|
struct
|
|||
|
|
{
|
|||
|
|
uint16_t value; // Ũ<><C5A8>ֵ 999<39><39>Ӧ99.9%
|
|||
|
|
LightState is_light; // <20><>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
|||
|
|
}oxg;
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
}PanelDisplayInfo;
|
|||
|
|
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD>
|
|||
|
|
extern volatile PanelDisplayInfo panel_display_info;
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
/************************** <20><><EFBFBD>ⲿ<EFBFBD><E2B2BF><EFBFBD>õ<EFBFBD>API<50><49><EFBFBD><EFBFBD> **************************/
|
|||
|
|
void user_display_init(void); // <20>ϵ<EFBFBD><CFB5><EFBFBD>ִ<EFBFBD><D6B4> <20><><EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC>GPIO <20><>ʾ<EFBFBD><CABE><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
void user_display_refresh(void); // ÿ<><C3BF>500msִ<73><D6B4>һ<EFBFBD><D2BB> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ˢ<EFBFBD><CBA2><EFBFBD><EFBFBD>Ļ
|
|||
|
|
|
|||
|
|
|
|||
|
|
|
|||
|
|
#ifdef __cplusplus
|
|||
|
|
}
|
|||
|
|
#endif
|
|||
|
|
|
|||
|
|
#endif /* __8F_5AW_DISPLAY_H */
|
|||
|
|
|
|||
|
|
/************************ (C) COPYRIGHT Yuwell *****END OF FILE****/
|